Forward error correction in 5G heterogeneous network

Abstract

In this research, the feasibility of developing a complete polar FEC chain of 5^th generation cellular mobile communication standard in software. Specifically, on general purpose processors. Paperwork attempts to achieve stringent latency requirements through software, algorithmic and platform specific optimizations. Many algorithms in FEC chain are optimized for hardware implementations. Direct implementation of these algorithms in software results in poor performance. To obtain best performance in terms of latency on general purpose processors, these algorithms are modified or reformulated to suit processor architecture and software implementation. Initially both encoding and decoding FEC chains are implemented naively without any optimization. Code profiling is performed on this naive implementation to identify the significant latency contributors. The research split algorithms of significant latency contributing components into primitive operations. These primitive operations are optimized either with software optimizations or mapped to specialized functional units of a general-purpose processor to achieve best performance using CRC calculation in 5G cellular networks. Optimizations reduced the worst-case latency of the encoding FEC chain from 158µs which is more than 10x reduction in latency with communication rate.